Re: C3088 CMOS Imaging Sensor Questions




"Meindert Sprang" <ms@xxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message
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"Bob" <SkiBoyBob@xxxxxxxxxx> wrote in message
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I don't know if it will easily interface to your PIC, but I used a IDT
7205
FIFO to capture sub-windowed images from a camera. Once a sub-frame is
in
the FIFO, you can read it out non-destructively for multiple passes at
the
data. Gruesome, but better than nothing.

Gruesome? How would you rate the following?

An 8051 connected to an SRAM chip of 256kbyte, together with a CPLD and an
ADC. To capture an image, the 8051 would toggle a pin on the CPLD and then
go into power down mode. The CPLD detected the power down mode (which also
floats the 8051's bus pins), took over the SRAMs address bus, enabled the
ADC on the databus and pumped an image from ADC to SRAM at a fixed
location.
When the transfer was complete, the CPLD floated it's bus pins, disabled
the
ADC and interrupted the 8051 from power down mode back to life.....

Meindert

I call that *true* DMA, of course ;-)

Nice work, Meindert!
Bob


.



Relevant Pages

  • Re: C3088 CMOS Imaging Sensor Questions
    ... Gruesome, but better than nothing. ... the 8051 would toggle a pin on the CPLD and then ... ADC on the databus and pumped an image from ADC to SRAM at a fixed location. ... When the transfer was complete, the CPLD floated it's bus pins, disabled the ...
    (comp.arch.embedded)
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    ... Take a CPLD like ATF1502BE, and it should do 16 bit SPI/SSC duplex, ... so you can read a ADC result, and send a DAC in the same 16 clocks, ... and use the clock generators to set the rate, ...
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    ... It is quite easy to set up shared memory access on a Microcontroller, ... CPLD access to the idle periods in the uC bus - that way, ... you emulate dual-port memory with cheap SRAM. ... The only potential concern with having the CPLD do the arbitration of the SRAM bus is needing too many I/O pins on the CPLD, but I'm sure that can be dealt with, too. ...
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    ... The direction of the SRAM ... that enables the output of your ADC and the OE/WE lines. ... (all taking care to honour setup/hold times for the SRAM) ...
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    ... im seeing the rabbits which had lots of RAM but i dont have any ... what do you recommend for the job? ... I once designed a board with a CPLD providing addresses for a 128kbyte SRAM. ...
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