Re: ARM Interrupts
- From: Tauno Voipio <tauno.voipio@xxxxxxxxxxxxxxxxxxxxx>
- Date: Fri, 14 Jul 2006 20:37:25 GMT
Andrew Blackburn wrote:
Hi there
Looking at several processors at the moment but ARM7 and Coldfire in particular. I like the popularity of ARM and associated tools, but cant get over the fact that the interrupt structure within them (only two priority levels) is pants. Coldfire has 7 or 8 nestable levels.
I would appreciate anyones view on this.
Please remember thet the ARM is a processor core only.
It is usually embedded as part of a larger chip containing
a bunch of necessary peripherals, including an interrupt
controller.
For examples, get the data for Atmel AT91 series chips.
The need for several nested interrupt levels usually
comes from an attempt to avoid a thread scheduler or
attempt to do wrong things in the interrupt service.
--
Tauno Voipio
tauno voipio (at) iki fi
.
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