Re: Embedded software interview question collection

"Michael N. Moran" wrote:
Julian Gardner wrote:

Well ive been arguing with a company because they cant get to
grips what volatile really does and because of this the new piece
of hardware they have released witb an embedded processor does
not work if the cache is switched on!!!!

I have tried for 2 years to get them to understand but they still
screw the design up.

I now need to got through all my code and try to move every
variable into a seperate block of memory so there will be no
memory corruption.

Off topic, but ... maybe it's because my brain hasn't clicked on
yet, but what has the use of volatile got to do with cache?

Say the variable is really a hardware status bit, memory mapped.
If declared volatile in the code there will be a memory access for
each read. If the hardware diverts that read to the cached value,
it will no longer reflect reality. So the system needs some means
of automatically invalidating the cache. To me, this is a primary
objection to using memory mapped i/o ports, which can easily be
avoided with a separate i/o space.

I don't know if this is the OPs problem, but it seems likely.

--
"I was born lazy. I am no lazier now than I was forty years
ago, but that is because I reached the limit forty years ago.
You can't go beyond possibility." -- Mark Twain



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Relevant Pages

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  • Re: Embedded software interview question collection
    ... volatile really does and because of this the new piece of hardware they have released witb an embedded processor does not work if the cache is switched on!!!! ... I now need to got through all my code and try to move every variable into a seperate block of memory so there will be no memory corruption. ... and this could be catagorized as DMA. ...
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