Rationale behind the Modebits

The mode bits of ARM7 in CPSR are of 5 bit width when the processor is
capable of operating in one of the 7 modes.
I would like to know what is the rationale behind using 2 additional
bits instead of going only for 3 bits(that can represent max of 8
Has it got to do with anything related to simpler implementation logic
or is it for any particular historic reasons associated with ARM