Re: non load/store architecture?

drizzle wrote:

Hi
What are architectures that are not load/store called ? To
clairfy, architectures that have instructions other than load/store
than can access the memory. I am wondering what is the motivation for
such instruction sets ? Are there any existing examples of such
processors.


Homework?

There are plenty that "have instructions other than load/store
than can access the memory".

Anything that has INC/DEC/DJNZ of a direct memory address qualifies.
So that gets you 8051, 6805, 68HC11, Z8, Zeno, PIC18?, Coldfire, etc

If you want interesting special cases, look at
** the Intel 8096, that had no ACC, all operations were
Reg-Reg, but it used 256 registers
** Any RISC Reg-Reg design, that also has a register frame pointer
The C166, and Z8 ( and IIRC, some Sparcs?) have these, which allow
the reg-reg opcodes to work into any window of larger SRAM.

Q: is that now accessing register, or memory ?

-jg

.

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