Re: non load/store architecture?



Jim Granville wrote:

Anything that has INC/DEC/DJNZ of a direct memory address qualifies.
So that gets you 8051, 6805, 68HC11, Z8, Zeno, PIC18?, Coldfire, etc

If you want interesting special cases, look at
** the Intel 8096, that had no ACC, all operations were
Reg-Reg, but it used 256 registers
** Any RISC Reg-Reg design, that also has a register frame pointer
The C166, and Z8 ( and IIRC, some Sparcs?) have these, which allow
the reg-reg opcodes to work into any window of larger SRAM.

Q: is that now accessing register, or memory ?

Of all the computers I have used only the IBM 1620 was the only pure
memory only computer with no programming concept of registers. There
have been some near misses, processors that put their registers in memory
and some like the ones you have referred to like the Z8 and RS08
more recently that moved many of the accumulator operations to
memory to memory operations significantly improving the execution
bandwidth by doing so.

The IBM 1620 was additive and remarkably nice to program.
Conceptually it had a lot going for it. Numbers were stored as variable
length fields. Adding two 40 digit numbers took the same code as adding
two 5 digit numbers. Two or three years ago we looked at the IBM 1620's
instruction set as a model for an embedded processor memory only
instruction set. The extra address field in most instructions killed the
advantages of memory to memory operations. I suspect that quite a few
people have gone through the same exercise.

w..




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