Re: non load/store architecture?


David Brown wrote:

Even on cached processors, small code means better use of the cache.
Critical loops will (should!) fit within even a small instruction cache,
but programs consist of more than their critical loops. A complete
instruction cache miss might mean a stall of a hundred or more clock
cycles (which might be worth twice that in instruction counts on a
superscaler processor) - there is a reason why more expensive processors
have larger instruction caches. More compact code gives the same
benefits of a larger cache.

For example, take a graphical application, like a web browser, waiting
for the next network packet that comes in for an image it has
requested. As the packet is received, we basically get a one-shot code
execution of the interrupt handler, network stack, firewall,
application, GUI libraries, and graphics driver. All added up, that's
quite a big chunk of code, with poor locality, and very little looping.

.