Re: Trace length for SDRAM lines?

Not Really Me wrote:

How important is the trace length balance on signal lines to SDRAM? I recall coming across a document saying that the trace lengths needed to have less than .5 inch difference from shortest to longest. But I think that was a DDR2 doc.

I see some very obvious S curves in the lines on an Atmel SAM9261 EK board that uses PC100 speed SDRAMS. We will be using similar parts on a new design. Someone else I have been chatting with says not to worry about it.

It doesn't seem to be a very straight forward thing to do, although possibly some pcb layout software can do this automatically.

Does anyone have strong support for using or not using length balancing? If it's important, processor is the SAM9261 and there will be two 16 bit SRAMS (for 32 bit wide data path) and 1 16bit Flash.

Scott



I would go with the SDRAM manufacturer's recommendations on this. One of the critical enabling ideas behind SDRAM is that it regenerates the clock back to the processor, which uses the SDRAM's clocks to drive it's receive state machine. This only works if all the pins act the same way, which only happens if they all see similar loads.

I expect that at lower than maximum speeds and at benign temperatures you can get away with violating this to some extent -- after all, there's got to be some margin in there anyway. However, I'd rather spend a known amount of time laying out these traces by hand than I would spending an unknown amount of time discovering whether dissimilar traces would work well enough over temperature and part-part variations. Better yet, I'd rather do it by the manufacturer's guidelines without drama rather than having things fail in the field.

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Tim Wescott
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