Re: PIC vs ARM assembler (no flamewar please)
- From: "rickman" <gnuarm@xxxxxxxxx>
- Date: 20 Feb 2007 12:30:42 -0800
On Feb 20, 2:14 pm, Jim Granville <no.s...@xxxxxxxxxxxxxxxxxxxxxx>
wrote:
rickman wrote:
Using RAM for registers in the way that the TMS9900 did is a concept
that had its time and the world has moved on. It made sense when
register and memory has nearly the same speed. Now that memory is the
speed bottleneck for CPUs, it would be horribly slow to implement.
I think you missed my uC = microcontroller. (AVR <> CPU)
What you state is correct for megabyte CPUs, with all the cahce and
SDRAM fruit, but certainly NOT true for single chip microcontrollers.
CPUs being pressed into uC service, is one of the drawbacks with some
approaches. Quick and dirty, yes, efficent, no.
I understand. The TMS9995 was much closer to an MCU with onboard RAM
and it still was much slower than register based CPUs.
The TMS9900 used a pointer register (that's right, registers did not
go away) to point to the first register in memory. An ADD would then
take three memory accesses to complete rather than one clock cycle.
Even if you put the memory on chip, you either have to limit the
location of the registers to a special bank of fast, multiport memory
(register bank) or you have to accept multiple memory cycles for a
single instruction, even when working in registers.
Sounds like a poor example of how anyone would do this today.
Look at the XC166, and eZ8, for examples of how you can do
very efficent memory overlays.
In a uC, you are talking of a few K's of memory, so speed should
not be an issue at all.
But for RAM to be as efficient as a register file it has to be triple
ported so you can read two operands and write back another... or you
have to go to an accumulator based design. Once you have triple
ported RAM, you have just added a register file! A rose by any other
name still smells as sweet...
.
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