Re: Protecting I/Os

In comp.arch.embedded,
A.D. <isd_mod@xxxxxxxxx> wrote:
Hi all!
I'm designing a data acquisition system with a number of
analog and digital I/Os. I'm wondering if it is wise (or even
mandatory) to insert some kind of I/O protection.
The system will work with low voltage signals (+-5V) with
a bandwidth of 1MHz or less...
Witch kind of protections are commonly used for this kind
of sistems, and how are they implemented?

This depends very much on the application, the physical construction,
country you want to sell it in,....

But if these I/O pins are touchable from (or at least close to) the
outside and you want to pass the CE EMC testing, you will have to ask
yourself (among other things) how these I/O pins will handle an 8kV
(contacting) or 12kV (air) discharge from an ESD zapper.

But there are many other aspects to consider.

How to protect inputs again depends on a lot of factors. Usually a series
resistor, a capacitor and a diode clamp (which may already be inside the
chip you are connecting to) will work nicely. But an arrangement like that
may mess up your IO specifications. There are also special components for
protection like chokes and transzorbs.

Stef (remove caps, dashes and .invalid from e-mail address to reply by mail)


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