Re: Atmel releasing FLASH AVR32 ?



Ulf Samuelsson wrote:

"Jim Granville" <no.spam@xxxxxxxxxxxxxxxxxxxxxx> skrev i meddelandet news:4600f533@xxxxxxxxxxxxxxx

Ulf Samuelsson wrote:

Branch prediction cost is chasing an ever eluding target.
With multithreading you can swap in a computable process and use EVERY cycle.

I'm with you up to this point, but the challenge with hard-real-time
multithread, is the code-fetches feeding that "computable process" still has to come from somewhere ?


If you fetch a large chunk of code in each fetch to a prefetch buffer
this is not a problem.


I can see Multithread doing good things for removing SW taskswitch,
and lowering interrupt latencies, but unless you do fancy things with
the code pathway, you are actually thrashing the memory about even more.


No, I see embedded multithreading as one threa accessing external memory
while all the other threads (mostly) accesses internal high bandwidth memory
without any nasty cache in between.

I think you have mentally added quite a bit of hardware.
If you do what you describe, then you need a wide buffer per thread ?
- so have dictated a quite special memory architecture, and that has
to be on-chip.
[ it is still simple, and deterministic to a point, but it is special ]

If you extend that wide buffer to be interleaved (see AT27LV1026], then you can cross a boundary (sequentially) and not have that affect things - so the tools can be simpler.


Someone like Atmel could do this, but the IP suppliers who sell Microprocessors as Microcontrollers are pushing in a different direction.

-jg

.



Relevant Pages

  • Re: Atmel releasing FLASH AVR32 ?
    ... With multithreading you can swap in a computable process and use EVERY ... you are actually thrashing the memory about even more. ... You can do a WLAN MAC in 10's of kB with a 20 MIPS CPU. ...
    (comp.arch.embedded)
  • Re: Atmel releasing FLASH AVR32 ?
    ... With multithreading you can swap in a computable process and use EVERY cycle. ... you are actually thrashing the memory about even more. ... If you had your magic CPU, that could do 5 x 20 MIPS, how do you ...
    (comp.arch.embedded)
  • Re: PostMessage and unprocessed messages
    ... so adding memory management complexity to the ... of created messages from the sender, i.e. the sender creates a message and ... For example, to build the old DOS apps, I think that people used assembly. ... the next level of complexity is multithreading. ...
    (microsoft.public.vc.mfc)
  • Re: Threads and Comments
    ... thanks for pointing out that one is safe modifying a ... there might be issues due to memory ordering on SMP systems.. ... while CPU2 reads variable and accesses CONS. ... or better drop multithreading support for such weakly ordered platform ...
    (comp.lang.lisp)
  • Re: Utility of find single set bit instruction?
    ...  With massive multithreading *and* looser consistency between ... were active in a CPU at once. ... I've sort of lost track of the Cray ... Within recent memory, the high-volume buyers apparently haven't much ...
    (comp.arch)