Re: cyclic redundancy check 4-bit

On 8 May 2007 13:57:06 -0700, Dave Hansen <iddw@xxxxxxxxxxx> wrote:

On May 8, 11:16 am, Vladimir Vassilevsky <antispam_bo...@xxxxxxxxxxx>
wrote:
bwv539 wrote:
Any standard implementation?
I need to send 4-bit messages over a very slow and noisy link, I
cannot afford 8-bit crc.
thank you.

The Hamming code 7.4 or 8.4 is what you need.


Well, maybe.

But if the link is very slow, or the noise is bursty, a single-bit ECC
code that doubles the required bandwidth isn't going to help him much.

If the total message net size is really 4 bits, then there is not much
that can be done with error bursts, since there is not much use of
interleaving (and hence spreading out the burst error to individual
bit errors) that are usually easier to correct.

Are all 16 possible states of the 4 bit messages actually used ? If
for instance only 10 different messages are actually used, it might be
better to assign 10 sufficiently different transmit sequences (longer
than 4 bits), in which the correct sequence can be determined, even if
some bits are incorrect.

If less than 16 message types, are not all messages equally important,
use more ECC for the critical messages (such as reset).

What about clock synchronisation, is it synchronous or asynchronous ?

If asynchronous, if the noise generates a false start bit just before
the real start bit, the bit synchronisation will be incorrect for all
the remaining bits, so one should check that a shifted copy of a valid
message is not a valid different message.

Then again, a 4-bit CRC isn't going to help much more than a simple
checksum, either...

When talking about CRCs and checksums, there must either be a way to
ask for retransmission if an error occur or simply discard the message
(in a sampled system, hold the previous value or use the average
between the previous and next valid sample).

If this is not possible, then some kind of ECC should be used.

Paul

.

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