Re: New ARM Cortex Microcontroller Product Family from STMicroelectronics



"Wilco Dijkstra" wrote...

"rickman" wrote...
On Jun 22, 2:34 pm, Eric wrote:
On Jun 22, 12:40 am, "Bill Giovino" wrote:

However, if you are running out of Flash with the CPU at a higher speed than the
Flash,
and so the Flash requires wait states while taking advantage of the Harvard
architecture

Any idea if the ST Cortex M3 can run without wait states from flash at
their rated speed? That would be quite impressive.

The data *** says it requires one wait state from 24 to 48 MHz and 2
wait states above 48 MHz. So compared to the Luminary parts running
at 50 MHz with *NO* wait states, I say the ST M3 parts are dogs.

It's not that bad. Cortex-M3 has a prefetch buffer and branch prediction. This
means that the cost of a single waitstate can be hidden for conditional branches,
ie. only indirect branches have a penalty. With 2 wait states the branch prediction
only works on unconditional branches, so you'll get a slowdown. However you can
change loops to use an unconditional branch at the end so they run at the speed
of zero-wait state memory.

Completely correct. But you must remember that often devices like these are not often
used at their full speed.

ST certainly has excellent embedded Flash processes that can run faster than 24MHz and
they deliberately chose not to use any of them for this product. In the case of this
device, it looks like it was developed speifically for low power applications, where the
issue isn't really instructions per second, but milliamps per second. The intelligent
peripherals, and especially the non-intrusive DMA, allow developers to run the core
slower.

When competing with commodity devices, (and anything licensed from ARM has become a
commodity), a microcontroller company needs a competitive advantage. ST's advantage is
their superior in-house process technology. Only TI (who also licenses the ARM Cortex)
competes with ST when it comes to superior in-house process technology, and, hey, ST and
TI are so close in process ability I wouldn't bet on the difference between the two.

Bill Giovino
http://Microcontroller.com
http://www.microcontroller.com/news/arm_cortex_stm.asp




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