Re: Help needed with SCI interrupts (HC12)

On Jun 28, 5:11 am, ryufr...@xxxxxxxxxxx wrote:

I checked and it appears that the ISR is not reached before program
crashes (SCI1In reached). So i guess my mistake is at a lower level,
something to do with my interrupt implimentation mayb.e

Please describe what you mean by crashes. For example, does it jump
to an arbitrary address outside of the program and thus trigger the
software trap debugging interrupt?

What is your debuger and target connection?

One general note: your memory section pragmas look a little
suspicious. You need to be sure that everything that runs as a result
of the interrupt is in the non-banked memory section - both the ISR
routine, and anything it calls . If you don't it will likely work
fine until your program grows to the size where bank switching is
required, at which point it will start failing in very odd ways.

I`m not really sure what to do with this. Any suggestions are more
than welcome

You need to have a non-banked memory section in your linker .prm file
(assuming codewarrior) which will not be banked switch and thus always
reliably there when an interrupt occurs, and you need to put your
interrupt service routine and anything that it might call in that
section.

If you are using the .prm from the connector app, this section is
called NON_BANKED
so you would precede your ISR and anything it uses with a

#pragma CODE_SEG NON_BANKED

and follow it with a

#pragma CODE_SEG DEFAULT

Also make sure that you are getting the address of the ISR correctly
loaded into the vector table. In the connector app, vectors.c does
that and would need to reference your ISR.

.

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