Re: Low Dhrystone score on Tricore TC1796

bfroemel@xxxxxxxxx wrote:

I am doing the Dhrystone benchmark on a TC1796A microcontroller from
Infineon with different compilers (TASKING, Hightec-RT GNU GCC). Both
compilers are set to produce highest speed optimized code, still I
only get about 15 DMIPs with GNU GCC and about 20 DMIPs with TASKING.
CPU is running at 150MHz, 75MHz system clock, programs run from
external SRAM; no difference (as it should be) with or without
connected Lauterbach Debugger.
TASKING performs probably better because of the optimized libc, still:
the difference is big and it seems overall very low compared in DMIPs
per MHz (0.1 DMIPs per MHz) to other microcontrollers: e.g. Freescales
MPC555 where DMIPs per MHz are at least over 1.

In fact my readings are so low that I think I either misconfigured
something profoundly wrong or my board design is broken.

Has anyone done similar tests or has any comments?

Can you do a comparison with the code (at least the core loops) running from internal RAM? As you know, there are several distinct banks of internal RAM, having different properties. Some execute faster than others.