Re: Low Dhrystone score on Tricore TC1796

bfroemel@xxxxxxxxx wrote:
It's *very* normal for the TC1796! Some of those internal banks have
paths 8 words (256 bits) wide. See the context-management instructions
for an example of this (you have, of course, put the context list in the
proper RAM bank: there's just one intended for contexts.)
You may get further speed-ups if you relocate code to the internal
flash, & turn on code caching (if it isn't on already).
Afaik, TC1796 is really intended to run all its code either in the
internal flash, or in the so-called "scratchpad" RAM area. The real
purpose of RAM-resident code (in this chip) is to enable you to
self-reprogram the code flash: like most flash, it is inaccessible while
a program/erase cycle is running.

Thanks for clearing this issue! The guy who wrote those default linker
scripts either had no worries about execution speed or expected, like
me, more performance from the external bus.
CSA lists must be put into on-chip LDRAM on the TC1796, I didn't try
otherwise. I'll certainly heed your advice to use on-chip memories.

By the way, David, through my searches (there are still not many posts
about Tricore), I've seen that I missed a request from you about the
sources of the GNU Hightec-RT toolchain back in December 2006. Now,
they are finally offered on:
Back then, I've been given only a password protected FTP URL which
stopped to work a few days later.

Many thanks, Bernhard! I've hunted high & low for those, & not (till now) been able to get them.
Thanks again.