Re: USART design consideration

On Tue, 17 Jul 2007 03:50:03 -0700, tguclu <tugrul.guclu@xxxxxxxxx>
wrote:

Hi everyone ,i'm new to group.
In my project i need to use 3xUSART ports in order to build a SDLC
network. USART ports will function as the phy of SDLC as V.24
Anyway , this is not the point.

Each USART will work at 64kbps. So there is a network traffic of
almost 192 kps. The problem ise my cpu board doesn't have 2x UART but
no USART port so i have use a microcontroller with at least 3xUSART
and 1xUART to communicate with cpu board.


One of the candidate is M16C/62P group of Renesas which can operate
max. of 24Mhz .

Can you explain me what is the relationship with the CPU's clock freq.
and Baudrate of the UART module ?

The "nice" SSCs which can do HDLC/SDLC etc. are getting hard to find,
this type of functionality seems to be implemented in FPGAs these
days. The STR7 ARM MCUs have got 3x USART of which 2 if I recall
correctly can do HDLC at least. (Not sure about SDLC).
The Baud rate of the UART Module is handled no differently in SDLC as
in normal async mode. The only difference is that the clock is either
embedded in the data stream of something like manchester encoding is
used or each direction send a 1x Tx Clock as well as the data stream.
The ST ARMs has got a fractional divider so you can get almost any
baudrate you require from the range of CPU Clock frquencies supported.
If the SCC you choose does not have a fractional divider then CPU
clock can tipically only be divided by an integer number in the range
1 to 256 or sometimes 1 to 65536. Without a fractional divider you
probably will have to provide a separate clock for your baud rate.

Regards
Anton Erasmus

.

Relevant Pages

  • Re: USART design consideration
    ... In my project i need to use 3xUSART ports in order to build a SDLC ... USART ports will function as the phy of SDLC as V.24 ... and 1xUART to communicate with cpu board. ... used or each direction send a 1x Tx Clock as well as the data stream. ...
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  • Re: USART design consideration
    ... In my project i need to use 3xUSART ports in order to build a SDLC ... USART ports will function as the phy of SDLC as V.24 ... So there is a network traffic of ... and 1xUART to communicate with cpu board. ...
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  • USART design consideration
    ... In my project i need to use 3xUSART ports in order to build a SDLC ... USART ports will function as the phy of SDLC as V.24 ... So there is a network traffic of ... and Baudrate of the UART module? ...
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