Re: FPGA & Softcore Vs FPGA & MCU



"Jim Granville" <no.spam@xxxxxxxxxxxxxxxxxxxxxx> skrev i meddelandet
news:46e878e5$1@xxxxxxxxxxxxxxx
Ulf Samuelsson wrote:

Actel told us yesterday that the ARM was not really suitable for
inclusion in FPGA...
Frequency limited to 29 MHz, and would hardly fit into their smallest
FPGA
wihtout peripherals.

They believe more in their Cortex-M1, but personally I see few customers
where 512 kB flash applications only need a few kB of SRAM.
In practice you will need an external SRAM.

Of course, it is not so much an Engineering Solution, as a FPGA Sales
Solution - the drive is to sell more/bigger FPGAs, not to solve a pressing
design problem (in fact, you create a few : higher Power,
and much worse EMC, but the market-spin does no mention those! )

For apps where you CANNOT fit the code into a Microcontroller, the
playing field levels a little, but the speed comes in a distant
second to the 200MHz+ alternatives.

Of course, Microcontrollers keep getting bigger: 4MByte is one
data point.


No way that is going to compete with a std ARM micro for price,
performance and power.
You will need that customization urge, to be interested.

Any volume business can be handled by products like the AT91CAP stuff
which will allow custom chips in realistic distribution volumes (15-25
ku/year)

Do Atmel have any plans to do some point-mask solutions based on this ?


The AT91CAP products was conceived as a way to cost effectively bring out
new
customized AT91 circuits. Now the focus has shifted slightly, but this is
still a possibility.

The current focus is on winning all designs incorporating
a combination of an MCU and an FPGA.

The dedicated interface between the parts allow the FPGA access to the
internal of the MCU (It can become an AHB master),
so it is decidedly superior to a solution putting the FPGA on the memory
bus.

The idea is that if you win all those designs in general, you
also win all high volume designs in particular which can then
migrate to a mask version,losing the cost of the FPGA.

The NRE to do this is less than 20% of the NRE of a standard cell ASIC
and the design will be much simpler, so it is expected that the volumes
mentioned above will really be the starting point.

Then again, the price for the custom version is lower than the price for
the version bonding out the dedicated FPGA interface (due to less pins),
so Atmels revenue will be higher if they don't do the conversion :-)




-jg




--
Best Regards,
Ulf Samuelsson
This is intended to be my personal opinion which may,
or may not be shared by my employer Atmel Nordic AB


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