Re: 78K0 programming

alanis wrote:
alanis wrote:
larwe wrote:
"alanis" <alan.gor...@xxxxxxxxx> wrote:

... snip ...

You did not specify a problem. Your original message says, in
essence, "I need to do something and there are signals and stuff
and it's all technical and I'm lost". I believe you have two
difficulties:

1. You don't understand or cannot describe the task you are
actually trying to do, and

2. Someone has told you to use a godawful processor to do it.

2.)What other HW alternetive do you suggest.?

Something that other people are using, where you can go to those
people with specific problems, if you get to the stage of having
specific problems. Maybe AVR. Maybe 8051.

I have send you e-mail. Please be so kind to take a look.

e-mail is for private communication. Usenet is public. While
Larwe may be willing to give you general advice, why do you assume
he (or anyone) is willing to go further? What is the deep purpose
in hiding your problems and system from the general readership,
among which may be someone willing to help. Start by specifying
the problem.

- good question. I didn't think about this on this way. I don't
know, if someone would need my help, and if i know how to help
him, i would be glad to help out.

Don't worry, am not hiding the problems :-). It's just that i
didn't see that someone ( on this newsgroup ) is exchanging the
source code data, so i though that private approach would be
better. Sorry for that.

Am searching a way to read digital signal passed from my external
device onto my nec debugger. Digital signal is transferring (
among others ) standard smart card data. This standard smart card
data is defined in first bytes. My problem is that i dont know
how to pull out this bytes in 78K0S, so that i can define if the
wright signal is passed or not.

You are improving, but there appears to be a language barrier (may
be age) evidenced by the spelling and failure to use capital I or
proper apostrophes. You also failed to properly snip the quotes,
and to limit your line length. 72 chars is needed, 67 is better.
I have done an elementary snip of this to show the idea, but have
not really removed anything.

Make it easy for your readers to read, quote, and answer.

--
Chuck F (cbfalconer at maineline dot net)
Available for consulting/temporary embedded and systems.
<http://cbfalconer.home.att.net>



--
Posted via a free Usenet account from http://www.teranews.com

.

Relevant Pages

  • Re: Quartus II infered latches
    ... it does not matter what intermediate signals or any ... statement or a selected signal assignment statement. ... the way you have to specify a don't care is to specify the ...
    (comp.lang.vhdl)
  • Re: Quartus II infered latches
    ... it does not matter what intermediate signals or any ... statement or a selected signal assignment statement. ... the way you have to specify a don't care is to specify the ...
    (comp.lang.vhdl)
  • Re: std_logic_vector signals in sensitivity list process
    ... language for hardware synthesis. ... one in a simulation environment, ... If you specify the wrong sensitivity list by accident, ... or specify no signals at all in the sensitivity list. ...
    (comp.lang.vhdl)
  • Re: [newbie] Verilog test bench with automatic verification
    ... signals needed for TB ... and everything else in specify ... DOULOS - Developing Design Know-how ...
    (comp.arch.fpga)
  • Re: [qt] - connect signal with my method
    ... Andrey Demidov wrote: ... specify the slot in the wrong name. ... what we declare using the signals ands slots methods. ...
    (comp.lang.ruby)