Re: SHARC vs ARM dev board, audio
- From: "Vladimir Vassilevsky" <antispam_bogus@xxxxxxxxxxx>
- Date: Fri, 5 Oct 2007 23:18:15 -0500
"Jim Granville" <no.spam@xxxxxxxxxxxxxxxxxxxxxx> wrote in message
news:4706c92c$1@xxxxxxxxxxxxxxx
Chris Carlen wrote:
<snip>
More power!!! That's all I want. I hope TI makes the C28xx family in
at least 200, or better 225, more better 250, or even more MHz someday
soon.
What would be even more cool, is an ADI DSC at 250-400MHz with the
F2812-like EVMs and a SHARC-like assembly language.
Isn't the ADI BlackFIN targeting that area ?
BlackFin is a strange machine of the "everything else" class. It is too slow
for the consumer video applications. The MMU is still born, so is the
BlackFin concept of user/supervisor modes. The set of peripherals is created
by mad savants. The core is a mix of 16bit and 32bit solutions. The errata
of ~50 pages; some of the bugs are just wonderful. Slow external bus. No
means to provide cache/DMA coherency. The speed of the bit banging is
limited by the bus clock (133MHz max), there are also quite complicated bus
arbitration and sequencing issues.
A few years ago, ADI _did_ have some single chip FLASH DSPs, but I
believe they did not like the scaling roadmap, and so switched to
RAM based solutions.
ADI used to have a line of the motor control flash DSPs based on the 21xx
core. That line wasn't popular and they terminated it. I could not find any
references about it at ADI web site: they remove all links to the parts that
they don't want you to use.
There is also BlackFin part with the internal flash (actually two separate
dies in one package), but too expensive.
Thus we now see BlackFIN much faster (600MHz) than any FLASH uC - most
flash controllers are significantly constrained by their flash speeds.
Why can't they make a flash with a bus width of 4096 or more bits? The whole
sector could be read at once.
It is rare to see any 32 but uC FLASH over 100Mhz, and often
real memory bandwidth is quite a way below that, when wait states and
cache effects are added.
With BlackFin, the cache helps dramatically. For my applications, the cache
efficiency is about 90%.
DSCs seem to nudge that up to ~150MHz, but not showing much sign
of further steps.
The new TI f28335 part, with FPU, seems one way to get higher
'mathpops', for a given flash speed.
The emulation of the floating point by TMS28xx is quite efficient. FPU is
mostly the sales point, however it could be handy on occasions.
Vladimir Vassilevsky
DSP and Mixed Signal Consultant
www.abvolt.com
.
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