Re: I2C trick?
- From: "Vladimir Vassilevsky" <antispam_bogus@xxxxxxxxxxx>
- Date: Sun, 30 Dec 2007 15:23:06 GMT
"Stefan Reuther" <stefan.news@xxxxxxxx> wrote in message
news:fl655s.mk.1@xxxxxxxxxxxxxxxxxxxxxxxx
Vladimir Vassilevsky wrote:
So far nobody suggested a
valid reason why exactly it is a bad idea to swap the SCL and SDA to
separate the I2C slaves.
If I see that correctly, the line-swapped device will see a start
condition whenever the master sends a '1' bit followed by a '0'; it will
see a '0' bit during a direction swap (between master releasing SDA
after the last bit and slave pulling SDA for acknowledge), and a '1' bit
during inactive periods (between a stop condition and a start
condition). This means, it is possible to construct a valid transaction
that is seen as, say, a start condition plus 8 data bits by the
line-swapped device. That device may now start pulling its SDA (i.e. the
current SCL) to low as an acknowledge, and thus lock up the bus.
I thought for a little about what you suggested, still I can't see how this
is possible. Would you please give an example.
Sure it's unlikely. But I've already seen devices lock up I2C even when
doing protocol, so I would avoid that trick if I can. Who knows what
goofs lurk in this world's I2C implementations.
This is certainly true. However I emphasise that nothing in the I2C
standard precludes from doing the tricks like that. There are no unfounded
assumptions. Everything behaves exactly as described.
Vladimir Vassilevsky
DSP and Mixed Signal Consultant
www.abvolt.com
.
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