Re: UART communication doubt
- From: Paul Burke <paul@xxxxxxxxxx>
- Date: Wed, 30 Jan 2008 12:46:22 +0000
Nandinikrishna wrote:
Hi I am Nandinikrishna I am working on C8051CF023 processor. How exactly
does synchronous and asynchronous communication take place. To transmit 0
bit the TXD line will be held low ie.,0V, to transmit 1 bit the TXD line
will be held at 5v. In asynchronous communication the processing speed of
the two terminal varies then how long should the TXD line be supplied with
the voltage?
It's not a doubt, its a question, as someone said before. I think what you are getting at is "how does a UART retain sync when the clock rates at the ends are bound to be different?" The answer is that the hardware starts a counter, clocked at several times the Baud rate (usually 8-16x), when the start bit arrives, and uses that as a relative reference to gauge the sampling point of the data. So as long as the clocks aren't too far out relative to each other, and as long as the data word isn't too long, by the time the stop bit arrives the bit level is still valid at the sampling point. Then the whole lot gets resychronised by the next start bit.
.
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