Re: UART communication doubt

Paul Burke wrote:
Nandinikrishna wrote:

Hi I am Nandinikrishna I am working on C8051CF023 processor. How
exactly does synchronous and asynchronous communication take
place. To transmit 0 bit the TXD line will be held low ie.,0V, to
transmit 1 bit the TXD line will be held at 5v. In asynchronous
communication the processing speed of the two terminal varies
then how long should the TXD line be supplied with the voltage?

It's not a doubt, its a question, as someone said before.

Doubt is fine. Surely you can adapt your phraseology to that of
something like 500 million English speaking Indians? And others.
Pure English is only spoken in Canada, and only in parts thereof,
where it has been preserved against the viscissitudes of vicious
fortunes for generations. :-)

I think what you are getting at is "how does a UART retain sync
when the clock rates at the ends are bound to be different?" The
answer is that the hardware starts a counter, clocked at several
times the Baud rate (usually 8-16x), when the start bit arrives,
and uses that as a relative reference to gauge the sampling point
of the data. So as long as the clocks aren't too far out relative
to each other, and as long as the data word isn't too long, by
the time the stop bit arrives the bit level is still valid at the
sampling point. Then the whole lot gets resychronised by the next
start bit.

The point is that the communications speed is normally pre-agreed
by some means outside the channel, and thus is pre-known to the
hardware.

--
[mail]: Chuck F (cbfalconer at maineline dot net)
[page]: <http://cbfalconer.home.att.net>
Try the download section.



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