Re: X-Mega AVRs are here!



"linnix" <me@xxxxxxxxxxxxxxxxxx> skrev i meddelandet
news:30e2fb0a-53b2-429d-80b7-15b040def232@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
On Feb 28, 1:23 pm, "Ulf Samuelsson" <u...@xxxxxxxxxxxxx> wrote:
On Feb 28, 12:28 am, "Ulf Samuelsson" <u...@xxxxxxxxxxxxx> wrote:

For people in this newsgroup that has been wondering...

Key features
* ATmegaAVR core (just higher frequency)
* 1.6V-3.6V operation
* Flash (max 384 kB)/SRAM/EEPROM
* 32 Mhz operation (max 32 MIPS)
* 44/64/100 pin package
The pinout allows a design to use 44,64 and 100 pin concentric
pads
with S/W compatability. Pin multiplexing will be identical for
all I/O ports, Larger devices will have extra ports, not
different
ports.
* 12 bit 2 Ms ADC/1 Ms DAC
* 4 level interrupts
* 4 channel double buffered DMA
* Advanced timers for Motor control
* Fancy new event system
* 2 uA in sleep w Brownout protection and 32 kHz osc.
* 100 nA in deepest sleep mode
* External bus in larger devices with SRAM/SDRAM support

Only thing missing is a LCD segment driver. Otherwise, we would
jump
right into it.- Hide quoted text -

- Show quoted text -

Atmel introduced the SAM7L series a few days ago, which is low power
and has an LCD segment driver, but meager SRAM (always something!)

http://www.atmel.com/dyn/corporate/view_detail.asp?FileName=AT91SAM7L...

But it does not come in 44 pins. We are small people working on small
projects, so smaller chip is better. We need 16K flash, 4 A2D and
12x4 or 8x8 segmented LCD.

I think that you might be able to create a simple LCD controller with the
X-Mega DMA controllers, timers and the event handling.

Yes, as long as we can set the outputs at 3V, regardless of battery
voltage.

You have a PLL with 4 x CPU clock (128 MHz) connected to
a timer, so It may be possible (didn't check) that you
can do a switch regulator for some of the I/O pins.

--
Best Regards,
Ulf Samuelsson
This is intended to be my personal opinion which may,
or may not be shared by my employer Atmel Nordic AB


.



Relevant Pages

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