Re: UART design considerations



On Mar 6, 12:29 pm, Keith M <kmo...@xxxxxxxxx> wrote:
On Mar 6, 2:27 am, "Ulf Samuelsson" <u...@xxxxxxxxxxxxx> wrote:

You use the three sample majority voter mentioned before to get rid of noise
in most UARTs AFAIK.
Some advanced UARTs detect edges which are a little off, and will
add/substract a sample from that bit to adapt to the incoming speed.

Once again, I saw Maxim doing that. That's pretty neat, pretty
advanced, and pretty unlikely I'm gonna touch it with a 10-ft assembly
pole. :)

Instead of sampling, you could only detect the time when there is an
edge on RXD and then make decision from that info.

Yeah, so you are saying to do edge detection to find the start bit,
and then, what, just use delays as I'm doing now between the bits, and
sample each bit?

No, measuring the time of the transitions would be done by setting an
interrupt or timer capture on each transition without "sampling" in
the manner you are thinking. The the pulse widths are calculated
which give you the number of bits high or low. You need a timer
interrupt or timing loop from the start bit to indicate the end of a
character since there will be no more transitions after the last low
to high which won't be the stop bit if the last data bits are high.

I have not seen this type of implementation, but it could be useful if
you have timer capture hardware, which I think you don't...


I don't really know what that gains me. Since I don't plan on using
interrupts for this(for simplicity's sake, other stuff going on in the
ISR, even though interrupts are disabled), I still have to check the
edge detect register for a value. And that checking would be subject
to the same "SNB/JMP" jitter I mentioned in an earlier reply.

There are other issues, like my uC not supporting edge detection on my
current port, etc.

If you don't use interrupts and don't have dedicated hardware, then
this is not a good approach.

.