Feasible to implement a router on a system on a chip?

Hi,

Is it feasible, or even possible to implement a complete router on a
system on a chip (i.e. on one FPGA)? The FPGA would be one of the
higher-end FPGAs that exist.

The router should be able to handle BGP and OSPF (i.e. traditional
router functionality).

For example, which of the following routers would be feasible/possible
to implment on a system on a chip (the router should be able to
forward the packets at full speed according to the interface
speed) ? :

-A router with four 1 Gbps Ethernet interfaces?

-A router with ten 1 Gbps Ethernet interfaces?

-A router with four 10 Gbps Ethernet interfaces?

-A router with ten 10 Gbps Ethernet interfaces?

Or does it sound completely undoable?
.

Relevant Pages

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