Re: Powerpc optimization change the order of operation
- From: David Brown <david.brown@xxxxxxxxxxxxxxxxxxxxxxxxxx>
- Date: Thu, 17 Apr 2008 19:13:14 +0200
Arlet Ottens wrote:
dreamerg wrote:Hi Does sombody know a way to disable optimization for part of a code?
I have a code that writes data to some HW machine. It has to do it in
acertain order. Although I use volatile to write to those adresses the
order in which the writes and read are done changes when I enable
optimization in the compiler. Is there a way to solve this without the need
to disable the optimization? I don't want to put this code in seperate
function in another file and disable the optimization only for this file.
Do you also use volatile variables to read ?
The compiler is not allowed to change the order of volatile accesses, even with optimizations enabled. If it does, it's a bug in the compiler. Did you talk to your compiler vendor ?
It is, of course, possible that the variables aren't declared properly, or that there's another error in the code. Perhaps you could post a small example of what you're trying to do ?
As well as all the above good advice, it's important to remember that "volatile" is an instruction to the compiler, not the processor. In particular, it won't affect things like caches, write buffers, and instruction re-ordering. Depending on the powerpc in question, you can get all sorts of re-ordering in the processor.
You have to make sure that your accesses are not cached, and that you use an "eieio" instruction (or equivalent, depending on the exact ppc model) to ensure that write buffers are flushed and any speculative loads are dropped between accesses.
.
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