Re: PMOS in parallel with NMOS
- From: rickman <gnuarm@xxxxxxxxx>
- Date: Sun, 11 May 2008 10:23:55 -0700 (PDT)
On May 8, 2:51 pm, Lanarcam <lanarc...@xxxxxxxx> wrote:
Walter Banks wrote:
Tomás Ó hÉilidhe wrote:
Here's an example of my thinking:
Let's say we have a resistor rated for 100 W (this is a worldwide
rating, inclusive of the Sahara and the Antartic). The resistor value
is 2 kilohms. This equates to a maximum current flow rating of 223 mA.
Would you not agree that it's possible to put more than 223 mA thru
this resistor if you're using it like this?
Maybe it is, let's see
i = e / r
e = i * r
e = 223 mA * 2K
e = 446volts
Is the voltage drop accross the resistor > 446Volts in normal use or
in any of the failure modes?
If the voltage is > 446 then it is possible to exceed 223 mA.
To be fair, you have to take into account all of
the laws that apply to transient signals, in
all circuit branches. In particular, the rise
in V starts by charging the transistor capacitors.
i = C.dv/dt
v = L.di/dt
v = Ri
You have to solve for i and v as functions of time
and see if the integral of dissipated power
exceeds the rated limits. That is rather involved,
you wouldn't be bothered with that for a normal
project, but a student could explore it if he
has time to spare.
Actually, if you are working with amplifiers, the power dissipated in
the amp is not as simple as the resistor because the voltage and
current are not the same function. In particular, the power
dissipated in an amp gets very hard to calculate if the output clips.
In my current design I needed to calculate the instantaneous power as
well because the frequency of the signal was fairly low, in theory it
could be as low as 20 Hz in a software failure mode.
The simple resistor assumption the OP is using does not hold very
often. As others have pointed out, pulsed current is the same as
steady state current only under the conditions where it is the same.
Yes, I know that is circular. I don't know off the top of my head all
of the conditions where the two are not the same. But that does not
mean they are always the same.
That is why I asked the OP to think about this himself. If he really
wants to *learn* something, he has to figure it out for himself.
Rather than continuing to stare at a problem and only seeing one side
of it, he needs to get up and walk around it and *learn* to see it
from other perspectives. I think even an undergraduate student should
be able to figure out some differences between the effects of pulsed
current and steady state current instead of making an ***assumption***
that they are the same in his "lump of material" model. Heck, he has
been given many indications of how pulsed current affects material
differently from steady state current. Instead of trying to learn, he
just argues.
.
- References:
- PMOS in parallel with NMOS
- From: Tomás Ó hÉilidhe
- Re: PMOS in parallel with NMOS
- From: rickman
- Re: PMOS in parallel with NMOS
- From: Tomás Ó hÉilidhe
- Re: PMOS in parallel with NMOS
- From: rickman
- Re: PMOS in parallel with NMOS
- From: Tomás Ó hÉilidhe
- Re: PMOS in parallel with NMOS
- From: rickman
- Re: PMOS in parallel with NMOS
- From: Rocky
- Re: PMOS in parallel with NMOS
- From: rickman
- Re: PMOS in parallel with NMOS
- From: Tomás Ó hÉilidhe
- Re: PMOS in parallel with NMOS
- From: rickman
- Re: PMOS in parallel with NMOS
- From: Tomás Ó hÉilidhe
- Re: PMOS in parallel with NMOS
- From: Walter Banks
- Re: PMOS in parallel with NMOS
- From: Lanarcam
- PMOS in parallel with NMOS
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