can c++ code be loaded to a hardware PGA coprocessor card
We have a particular software system/program
that spends a large fraction of it's time in two or three
particular functions that do lots of trig/geometric and matrix
calculations. Due to the nature of the algorithms they
use, they'll not parallelizable (the computer is a quad cpu box).
Also because the rest of the code depends on the results
from these functions, they are a bottleneck for the rest
of the code that we can split across cpus.
I think I've read that network hardware engineers use
special hardware that allows them to program the hardware
to directly implement code via "Programmable arrays" or something.
What I'd really like is an expansion card that would plug
into the bus and a toolkit so that these few C++ functions
in question would actually be implemented very fast in
hardware and not in software on the unix box. The C++ code
would call the function and the toolkit API would set it
up so that the function call goes to the card, is processed
and the result returned back to the C++ program as the return
looking to the rest of the code like it was done in the app.
I suppose the code for those functions would be dumped in a
binary file on the unix box, then the card would know to
load from the file when instructed to via a api call embedded
in the main application (in a constructor probably). Probably
the toolkit would have a way to define what C++ funcs to
grab to put on the card when the C++ is compiled.
Is this doable? I think Xilinx and other companies make the chips
that do this, but I'm having trouble finding the end companies
that make an actual card we can use.
thanks
Mark
.
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