Re: confused with 1's and 2's complements systems
 From: "robin" <robin51@xxxxxxxxxxxxxxxxxx>
 Date: Fri, 7 Jan 2011 14:10:38 +1100
"Mark" <mark_cruzNOTFORSPAM@xxxxxxxxxxx> wrote in message news:ig10t6$s9s$1@xxxxxxxxxxxxxxxxxxxx
 Hello,

 I was reading a wiki's article about representation of negative number by
 computers and by the end of the article got completely confused.
 I understand that one's or two's complement systems are used *exclusively*
 for negative numbers representation, i.e.

 if x < 0, then ~x + 1 produces two's complement value.

 (As I understood the 1's complement systems are rare now, and mainly
 obsolete)

 What I can't understand is:
 1) is this operation performed by CPU's ALU block ?
 2) when exactly, at what stage is this operation taking place by a CPU?
 3) what value is stored in registers  two's complemented or not?
 4) the article says that the most significant bit is a sign bit, but bitwise
 NOT will negate this bit and we loose the knowledge if the number's
 signdness?
Consider the following decimal and binary values, assuming a 4bit word :
7 0111
6 0110
5 0101
4 0100
3 0011
2 0010
1 0001
0 0000
1 1111
2 1110
3 1101
4 1100
5 1011
6 1010
7 1001
8 1000
The negative binary values are in twoscomplement form,
and are indicated by a 1bit in the leftmost position.
The association of any particular decimal value with a
negative binary value is quite arbitrary, because, as far as the
machine is concerned, all binary values are positive.
However, the twoscomplement form turns out to be very convenient,
because when you ADD a positive value to a negative value,
the correct sum is obtained, e.g.,
5 0101
3 1101
_______
=2 0010
There is a carry out of the lefthand side, but it is lost or discarded.
(Of course, summing any two positive values,
or any two negative values, similarly gives a correct result.)
.
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