Re: The variable bit cpu

Skybuck Flying wrote: 
"Patricia Shanahan" <pats@xxxxxxx> wrote in message
news:bmpHe.6965$0C.4828@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx

Skybuck Flying wrote:

congrats for  re-inventing a suboptimal 200 year old idea.
read up on the history of computing.


Actually putting a mark/line under something is probably even older than 

200

years ;)

Though it seems nobody has ever thought of using a marker under bits 

like

this:

1101101
0000001  <- digital marker ;)


How do you know it hasn't been thought of before, but rapidly rejected,
without being published, for excessive inefficiency? N-1 zero bits
followed by a 1 is among the least efficient known representations of
the number N.



Define inefficiency... you mention space inefficiency.

However it's simple, it's fast, it can be interleaved etc, it's flexible. 

How do you know it is fast? If you have enough of a processor design to
make performance evaluation possible I would be interested in seeing it.

I don't claim to be an expert on processor architecture, but I've been
a performance architect for large multiprocessor systems, and I've
worked enough with processor architects to have some idea of their issues.

In computer hardware, space inefficiency often causes time inefficiency.

For example, consider loading data from memory, one of my favorite
subjects. Each signal wire costs at least one chip pin, and the number
that can be supported by a package is limited. Each wire has a limited
number of times per second that it can change state cleanly. Moving two
bits for each data bit reduces the number of data bits that can be moved
from memory to processor in a second.

Similar issues arise in caches. Each cache has size limits that result
e.g. from physical layout limitations, especially caches that are placed
close to the arithmetic unit. Using space in a cache for metadata means
less space for payload data, so more cache misses. That applies at every
level of the memory hierarchy, from buffers in arithmetic units to main
memory.

Even if there is physical space to make something bigger, doing so
generally makes it slower and/or increases its power consumption. Two of
the main problems in computer architecture now are power distribution
and cooling.

To add anything to a processor design you need to show that it is a
better use of the resources it will take than competing uses.

Seriously, I suggest the following steps:

1. Unless you already have equivalent knowledge of computer architecture, read the Hennessy and Patterson book I recommended.

2. Evaluate your idea using the methods they give. Compare to
software-only implementation, as well as not doing it at all.

3. If you still think it is a good idea, take it to comp.arch.

[I don't recommend taking it to comp.arch without already having at
least the knowledge of CPU architecture and trade-offs contained in H&P.]

Patricia
.

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