Re: Next Generation of Language
- From: "Tim Bradshaw" <tfb+google@xxxxxxxx>
- Date: 12 Jan 2007 01:35:29 -0800
George Neuner wrote:
Well, on Cells the private memories are not cache but staging memories
... the main processor has to move data into and out of them on behalf
of the coprocessors. It's very similar to the multi-level memory
system used on the old Cray's where the CPU had to fetch and organize
data to feed the array processors and store the results back to the
shared main memory.
It doesn't matter very much who moves the data, it's still cache :-).
The issue that counts, really, is what the programming model is at the
user level. No one should need to care whether things are done
automagically by the hardware as most L1/L2 caches are today, or by
hardware with substantial SW support as, say, MMUs, or almost entirely
by SW with some small amount of HW support, as, say disk paging.
(Actually, the second thing that counts is whether the HW can
efficiently support the programming model you choose.)
AFAIK, no one has tried to offer a hardware solution to staging
computations in a distributed memory system since the KSR1 (circa
1990, which failed due to the company's creative bookkeeping rather
than the machine's technology). Everyone now relies on software
approaches like MPI and PVM.
Well, I think they have actually, in all but name: that's essentially
what NUMA machines are. Such machines are quite common, of course
(well, for bigger systems anyway): all Sun's recent larger machines (4
& 5-digit sunfire boxes) are basically NUMA, and it may be that smaller
ones are too.
Of course, as I said above, this comes down to programming model and
how much HW support you need for it. I think the experience of the
last 10-20 years is that a shared memory model (perhaps "shared address
space"?), preferably with cache-coherency, is a substantially easier
thing to program for than a distributed memory model. Whether that will
persist, who knows (I suspect it will, for a surprisingly long time).
Of course the physical memory that underlies this model will become
increasingly distributed, as it already has to a great extent.
--tim
.
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